ELITEGROUP COMPUTER SYSTEMS, INC.

SI55P AIO

Processor

Pentium

Processor Speed

75/90/100/120/133/150/166MHz

Chip Set

SIS

Video Chip Set

None

Maximum Onboard Memory

128MB (EDO supported)

Maximum Video Memory

1MB

Cache

256/512/1024KB

BIOS

Unidentified

Dimensions

330mm x 218mm

I/O Options

32-bit PCI slots (4), floppy drive interface, green PC connector, IDE interfaces (2), parallel port, serial ports (2), IR connector, VRM connector

NPU Options

None

CONNECTIONS

Purpose

Location

Purpose

Location

Serial port 1

J6

Power LED & keylock

J12 pins 11 - 15

Floppy drive interface

J7

Speaker

J12 pins 17 - 20

Parallel port

J8

IDE interface LED

J13

Serial port 2

J9

VRM connector

J15

IDE interface 2

J10

IR connector

JP2

IDE interface 1

J11

Green PC connector

JP7

Turbo LED

J12 pins 2 & 3

Chassis fan power

JP23

Green PC connector

J12 pins 4 & 5

32-bit PCI slots

PC1 - PC4

Reset switch

J12 pins 9 & 10

   

USER CONFIGURABLE SETTINGS

Function

Label

Position

 

On board I/O enabled

JP1

Open

 

On board I/O disabled

JP1

Closed

 

Flash BIOS voltage select 12v

JP3

Pins 2 & 3 closed

 

Flash BIOS voltage select 5v

JP3

Pins 1 & 2 closed

»

Factory configured - do not alter

JP20

Unidentified

DRAM CONFIGURATION

Size

Bank 0

Bank 1

8MB

(2) 1M x 36

None

16MB

(2) 2M x 36

None

16MB

(2) 1M x 36

(2) 1M x 36

24MB

(2) 2M x 36

(2) 1M x 36

32MB

(2) 4M x 36

None

32MB

(2) 2M x 36

(2) 2M x 36

40MB

(2) 4M x 36

(2) 1M x 36

48MB

(2) 4M x 36

(2) 2M x 36

64MB

(2) 8M x 36

None

64MB

(2) 4M x 36

(2) 4M x 36

72MB

(2) 8M x 36

(2) 1M x 36

80MB

(2) 8M x 36

(2) 2M x 36

96MB

(2) 8M x 36

(2) 4M x 36

128MB

(2) 8M x 36

(2) 8M x 36

Note: Board accepts EDO memory.

DRAM PARITY CONFIGURATION

Setting

JP8

Enabled

Closed

Disabled

Open

CACHE CONFIGURATION

Size

Bank 0

Bank 1

TAG

256KB (A)

(2) 32K x 32

None

None

256KB (B)

None

(8) 32K x 8

(1) 32K x 8

512KB

None

(8) 64K x 8

(1) 32K x 8

1MB

None

(8) 128K x 8

(1) 32K x 8

CACHE JUMPER CONFIGURATION

Size

JP18

JP19

256KB (A)

Pins 2 & 3 closed

Pins 2 & 3 closed

256KB (B)

Pins 2 & 3 closed

Pins 2 & 3 closed

512KB

Pins 2 & 3 closed

Pins 1 & 2 closed

1MB

Pins 1 & 2 closed

Pins 1 & 2 closed

CACHE VOLTAGE CONFIGURATION

Voltage

JP14

JP15

JP16

3.3v

Pins 2 & 3 closed

Pins 2 & 3 closed

Pins 2 & 3 closed

Mixed

Pins 1 & 2 closed

Pins 1 & 2 closed

Pins 1 & 2 closed

CPU SPEED SELECTION

CPU speed

Clock speed

Multiplier

J15

JP21

JP22

JP25

JP26

75MHz

50MHz

1.5x

6 & 7, 21 & 22

Open

Open

Closed

Open

90MHz

60MHz

1.5x

6 & 7, 21 & 22

Open

Open

Open

Closed

100MHz

66MHz

1.5x

6 & 7, 21 & 22

Open

Open

Closed

Closed

120MHz

60MHz

2x

6 & 7, 21 & 22

Open

Closed

Open

Closed

133MHz

66MHz

2x

6 & 7, 21 & 22

Open

Closed

Closed

Closed

150MHz

60MHz

2.5x

6 & 7, 21 & 22

Closed

Closed

Open

Closed

166MHz

66MHz

2.5x

6 & 7, 21 & 22

Closed

Closed

Closed

Closed

Note: Pins designated should be in the closed position.

CPU VOLTAGE SELECTION

Voltage

JP17

3.3v (STD)

Pins 1 & 2 closed

3.385v (VR)

Pins 3 & 4 closed

3.525v (VRE)

Pins 5 & 6 closed

DMA CHANNEL SELECTION

Channel

JP4

JP6

1

Pins 1 & 2 closed

Pins 1 & 2 closed

3

Pins 2 & 3 closed

Pins 2 & 3 closed

SERIAL PORT 2 SELECTION

Setting

JP2

Used as COM2

Pins 5 & 6, 7 & 8 closed

Used as IR connector

Open